Voltage drop (Vd) is the loss of voltage along a conductor due to its resistance and the current flowing through it. NEC recommends ≤ 3% for branch circuits; solar industry targets ≤ 2% DC and ≤ 1% AC for efficiency and MPPT margin.
Quick Facts
| Field | Detail |
|---|---|
| Term | Voltage Drop |
| Category | Solar Engineering |
| Engineering Discipline | Electrical Design |
| NEC Reference | 215, Chapter 9 Table 8/9 |
| Target | ≤ 2% DC, ≤ 1% AC |
| Difficulty Level | Beginner to Intermediate |
Voltage Drop Formula
DC voltage drop
Vd = 2 × I × L × (R / 1000)
where:
- I = current (A)
- L = one-way length (ft)
- R = conductor resistance (Ω/1000 ft)
- factor 2 accounts for the round-trip (out and back)
Voltage drop percentage
Vd_% = (Vd / V_string) × 100
Worked example
String at Vmp = 600 V, Imp = 13.5 A. Run to inverter: 80 ft (one-way). 10 AWG copper, R = 1.0 Ω/kft.
Vd = 2 × 13.5 × 80 × 1.0 / 1000 = 2.16 V
Vd_% = 2.16 / 600 = 0.36% → ✓ excellent
AC voltage drop
AC circuits add a reactance term alongside resistance, so the DC formula above only tells part of the story once the run leaves the inverter:
Vd = I × (R × cos θ + X × sin θ)
where:
- R = conductor resistance (Ω/1000 ft)
- X = conductor reactance (Ω/1000 ft, from NEC Chapter 9 Table 9)
- θ = power factor angle
For solar inverters operating near unity power factor, cos θ ≈ 1 and the reactance term shrinks, so AC voltage drop tracks close to the DC calculation for the same conductor and length. Longer inverter-to-panel or panel-to-transformer runs on three-phase feeders are where the reactance term starts to matter — this is the case where an AC cable sizing reference that carries Table 9 values, rather than a hand calc with Table 8 resistance only, earns its keep.
Resistance Values (Copper, NEC Chapter 9 Table 8)
| AWG / kcmil | Ω/kft | Suitable for |
|---|---|---|
| 14 | 2.52 | Short residential |
| 12 | 1.59 | Residential DC |
| 10 | 1.0 | DC home runs ≤100 ft |
| 8 | 0.63 | DC home runs ≤200 ft |
| 6 | 0.40 | Combiner outputs |
| 4 | 0.25 | Sub-feeder |
| 2 | 0.16 | Sub-feeder |
| 1/0 | 0.099 | Feeder |
| 4/0 | 0.049 | Feeder |
| 250 kcmil | 0.0419 | Feeder |
| 500 kcmil | 0.0214 | Sub-station |
Aluminum is ~60% the conductivity of copper — adjust upsizing accordingly.
Design Targets
- DC home run from combiner to inverter: ≤ 2%.
- AC from inverter to main service: ≤ 1%.
- AC sub-feeder to commercial inverter pad: ≤ 0.5%.
How to Reduce Voltage Drop
- Shorter wire runs — locate the combiner box near the inverter.
- Larger conductors — doubling size halves Vd; cross-check the selection against a DC cable sizing reference rather than rounding up by feel.
- Higher string voltage — 1,500 V plants have 1/4 the current of 750 V for same power, dropping voltage drop by 75%.
- Aluminum upsizing — economical for large feeders, requires 1 AWG up for equivalent ampacity.
- Multiple parallel runs — splitting current among multiple conductors.
Common Mistakes
- Forgetting the factor of 2 (round-trip) in DC voltage drop calculation.
- Using one-way length only for AC three-phase circuits where neutral/return doesn’t apply.
- Ignoring voltage drop when checking MPPT minimum.
- Designing AC drop within limits but DC drop over limits.
- Using cold-temperature resistance when hot operating conditions yield higher R.
Best Practices
- Show voltage drop calculation on the SLD for DC and AC runs.
- Use high-temperature resistance values (75°C–90°C) for derated conditions.
- Cross-check string Vmp at site hot temperature plus expected Vd vs. inverter MPPT_min.
- Use voltage drop calculators (NREL Wire Sizer, Mike Holt, Bluebeam plugins).
Standards & Certifications
- NEC 215 Informational Note No. 2 — Voltage drop recommendation.
- NEC Chapter 9 Table 8 — Conductor resistance values.
- NEC Chapter 9 Table 9 — AC resistance and reactance (large feeders).
Key Takeaways
- Voltage drop = 2 × I × L × R / 1000 for DC round-trip.
- Solar industry targets: ≤ 2% DC, ≤ 1% AC; NEC recommendation is ≤ 3% branch.
- Include Vd in MPPT lower bound checking for hot-day Vmp.
- Reduce Vd by larger conductors, shorter runs, or higher string voltages.
- Always show the Vd calc on the SLD or in the conductor schedule.
Related Reading
Voltage drop rarely gets modeled in isolation — it shows up as one of the ohmic-loss line items in a PVsyst or HOMER Pro loss diagram, so a designer chasing a bankable P50 number needs the wire schedule and the yield simulation to agree; the PV yield simulation software comparison and P50/P90/P99 yield report guide both walk through where wiring losses sit in that stack. On the electrical-drawing side, a solar SLD software package that auto-generates NEC-compliant one-lines is the practical way to keep the voltage drop schedule attached to the conductor sizes it was calculated for, rather than living in a separate spreadsheet that drifts out of sync. Since voltage drop and MPPT tracking range interact directly on hot-day Vmp, teams comparing tracking-algorithm behavior against wire losses may also find qbitsenergy’s MPPT algorithm entry a useful companion reference.
Frequently Asked Questions
8 commonly searched questions about Voltage Drop.
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